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An Application of Volterra Series to IC Buffer Models

Mihai Telescu 1, 2 Igor Simone Stievano 3 F.G. Canavero 3 Noël Tanguy 2, 1
1 Lab-STICC_UBO_MOM_PIM
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance, UBO - Université de Brest
2 Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (UMR 3192)
3 EMC Group
Abstract : This paper presents a Volterra-based method of behavioral modeling for the I/O buffers of digital ICs. While this technique brings a slight improvement in accuracy over previous ones, its main strength is a greater degree of generality. With a modeling approach less dependent on the nature of the devices and more easily extendable to include the effects of multiple inputs one may hope better meet the challenges of advancing technology. The proposed models can be obtained from device port transient responses only and can be easily implemented in any simulation environment, including SPICE-based circuit description software. Two illustrative examples conclude the paper.
keyword : Volterra kernels macro-modeling IC buffers signal integrity
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Conference papers
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https://hal.univ-brest.fr/hal-00485730
Contributor : Noël Tanguy Connect in order to contact the contributor
Submitted on : Friday, May 21, 2010 - 3:58:54 PM
Last modification on : Monday, October 11, 2021 - 2:23:45 PM

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  • HAL Id : hal-00485730, version 1

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INSTITUT-TELECOM | LAB-STICC_UBO | CNRS | UNIV-BREST | LAB-STICC | ENIB | LAB-STICC_ENIB | IBNM

Citation

Mihai Telescu, Igor Simone Stievano, F.G. Canavero, Noël Tanguy. An Application of Volterra Series to IC Buffer Models. 14th IEEE Workshop on Signal Propagation on Interconnects, May 2010, Hildesheim, Germany. ⟨hal-00485730⟩

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