This paper presents a Volterra-based method of behavioral modeling for the I/O buffers of digital ICs. While this technique brings a slight improvement in accuracy over previous ones, its main strength is a greater degree of generality. With a modeling approach less dependent on the nature of the devices and more easily extendable to include the effects of multiple inputs one may hope better meet the challenges of advancing technology. The proposed models can be obtained from device port transient responses only and can be easily implemented in any simulation environment, including SPICE-based circuit description software. Two illustrative examples conclude the paper.