A LUT based Approach for High Level Synthesis on FPGAs

Loic Lagadec; Bernard Pottier; Oscar Villellas; Erwan Fabiani; Catherine Dezan

Conference Papers Year : 2002

A LUT based Approach for High Level Synthesis on FPGAs

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1

Loic Lagadec

Function : Author

Université de Brest

Bernard Pottier

Function : Author

Université de Brest

Oscar Villellas

Function : Author

Université de Brest

Erwan Fabiani

Function : Author
PersonId : 1229416
IdHAL : erwan-fabiani
ORCID : 0009-0005-5884-6054

Université de Brest

CV

Catherine Dezan

Function : Author
PersonId : 13930
IdHAL : catherine-dezan
ORCID : 0000-0001-8857-6079
IdRef : 158776178

Université de Brest

CV

Domains

Hardware Architecture [cs.AR] Modeling and Simulation

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IWLAS_2002.pdf (9.47 Mo)

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Catherine Dezan : Connect in order to contact the contributor

https://hal.univ-brest.fr/hal-01862801

Submitted on : Monday, August 27, 2018-5:35:21 PM

Last modification on : Monday, October 11, 2021-2:23:21 PM

Long-term archiving on: Wednesday, November 28, 2018-3:44:17 PM

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hal-01862801 , version 1 (27-08-2018)

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HAL Id : hal-01862801 , version 1

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Loic Lagadec, Bernard Pottier, Oscar Villellas, Erwan Fabiani, Catherine Dezan. A LUT based Approach for High Level Synthesis on FPGAs. International Workshop on Logic and Synthesis (IWLS), Jun 2002, New Orleans, United States. ⟨hal-01862801⟩

A LUT based Approach for High Level Synthesis on FPGAs

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