A framework for high-level synthesis of heterogeneous MP-SoC - Université de Bretagne Occidentale Access content directly
Conference Papers Year : 2012

A framework for high-level synthesis of heterogeneous MP-SoC

Youenn Corre
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  • PersonId : 929407
Jean-Philippe Diguet
Dominique Heller
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  • PersonId : 929408
Loic Lagadec

Abstract

In this paper we propose an ESL synthesis framework which, from the C code of an application and a description of a generic architecture, automatically explores and generates a complete synthesizable version of a H-MPSoC architecture along with the adapted code application. We developed a Design Space Exploration (DSE) algorithm that merges hardware specialization, data-parallelism exploration, processor instantiation and task mapping according to user performance and cost constraints. We also inserted HLS in the DSE loop and get fast exploration of hardware acceleration. A new ESL framework is presented, it combines our contributions with some legacy tools issued from our and another team. We validated our framework with a case study of an MJPEG decoder
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Dates and versions

hal-00726481 , version 1 (30-08-2012)

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Youenn Corre, Jean-Philippe Diguet, Dominique Heller, Loic Lagadec. A framework for high-level synthesis of heterogeneous MP-SoC. GLSVLSI, May 2012, Salt Lake City, United States. pp.283-286, ⟨10.1145/2206781.2206850⟩. ⟨hal-00726481⟩
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