A new technique for the evaluation of analogue and mixed-signal (AMS)/RF BIST techniques at the design stage is considered in this paper. This requires the evaluation of costs such as area overhead, performance degradation of the circuit under test (CUT), and test metrics such as additional yield loss and defect level of the BIST approach. The evaluation of test metrics is a difficult task that requires adequate modelling of the CUT failure modes. These can be due to catastrophic and parametric faults due to the presence of defects, and process deviations. The evaluation of test metrics under the presence of single catastrophic and parametric faults requires proper fault models and has been considered in the past. However, the estimation of test metrics for the case of multiple parametric deviations and process deviations is very difficult to handle. There are no fault models for this and the estimation must be based on the generation of a large population of instances of the CUT. This requires a statistical model of the links between performances and test measurements. In this paper, we present a method to estimate test metrics under process deviations based on the use of Copulas. The method allows the generation of a large population of circuits having the same joint cumulative density function (CDF) than an existing small circuit population. Test metrics can be directly calculated from this large population of circuits. This approach is very fast and accurate since it takes into account all dependencies between performances and test measurements. The method will be illustrated for the evaluation of a BIST technique for an LNA and compared with past approaches.