Skip to Main content Skip to Navigation
Conference papers

Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder

Document type :
Conference papers
Complete list of metadatas

https://hal.univ-brest.fr/hal-00490480
Contributor : Erwan Fabiani <>
Submitted on : Tuesday, June 8, 2010 - 5:17:54 PM
Last modification on : Wednesday, June 24, 2020 - 4:19:21 PM

Links full text

Identifiers

Citation

Samar Yazdani, Thierry Goubier, Bernard Pottier, Catherine Dezan. Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder. ARC 2009, the 5th International Workshop on Applied Reconfigurable Computing, Mar 2009, Germany. pp.287-292, ⟨10.1007/978-3-642-00641-8_30⟩. ⟨hal-00490480⟩

Share

Metrics

Record views

567