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Conference papers

Architecture Models Refinement for Fine Grain Timing Analysis of Embedded Systems

Etienne Borde 1 Smail Rahmoun 1 Fabien Cadoret 1 Laurent Pautet 1 Frank Singhoff 2 Pierre Dissaux 3
2 Lab-STICC_UBO_CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance, UBO - Université de Brest
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https://hal.univ-brest.fr/hal-01121019
Contributor : Frank Singhoff <>
Submitted on : Friday, February 27, 2015 - 11:07:06 AM
Last modification on : Wednesday, October 14, 2020 - 1:43:24 PM

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  • HAL Id : hal-01121019, version 1

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Etienne Borde, Smail Rahmoun, Fabien Cadoret, Laurent Pautet, Frank Singhoff, et al.. Architecture Models Refinement for Fine Grain Timing Analysis of Embedded Systems. IEEE International Symposium on Rapid System Prototyping, Oct 2014, New Dehli, India. ⟨hal-01121019⟩

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