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Conference Papers Year : 2013

CACH-FTL: A Cache-Aware Configurable Hybrid Flash Translation Layer

Jalil Boukhobza
Pierre Olivier
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  • PersonId : 905154
Stéphane Rubini

Abstract

Many hybrid Flash Translation Layer (FTL) schemes have been proposed to leverage the erase-before-write and limited lifetime constraints of flash memories. Those schemes try to approach page mapping performance and flexibility while seeking block mapping memory usage. Furthermore, flash-specific cache systems were designed (1) to maximize lifetime by absorbing some erase operations, and (2) to reveal sequentiality from random write operations. Indeed, random writes represent the Achilles' heel of flash memories. Both cache systems and FTL schemes were designed independently from each other. This paper presents a scalable (in terms of mapping table size) and flexible (in terms of I/O workload support) Cache-Aware Configurable Hybrid (CACH) FTL. CACH-FTL uses a common feature of flashspecific cache systems that is flushing groups of pages from the same block. CACH-FTL partitions the flash memory space into two regions: (1) a data Block Mapped Region (BMR) collecting large groups of pages from the above cache (sequential I/Os), and (2) a small Page Mapped overprovisioning Region (PMR) which purpose is to collect/buffer small groups of pages coming from the cache (random I/Os) before moving them to BMR. CACH-FTL is flexible as it offers many configuration possibilities and can be adapted according to the I/O workload. CACH-FTL approaches the ideal page mapping FTL performance as it gives less than 15% performance difference in most cases.
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Dates and versions

hal-00796007 , version 1 (01-03-2013)

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Jalil Boukhobza, Pierre Olivier, Stéphane Rubini. CACH-FTL: A Cache-Aware Configurable Hybrid Flash Translation Layer. International Euromicro Conference on Parallel, Distributed and Network-based Processing, Feb 2013, Belfast, United Kingdom. pp.94-101, ⟨10.1109/PDP.2013.71⟩. ⟨hal-00796007⟩
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