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.:. Consultation > Par auteur > Awais Hussein .:.
7 documents classés par : 

ON-CHIP IMPLEMENTATION OF MEMORY MAPPING ALGORITHM TO SUPPORT FLEXIBLE DECODER ARCHITECTURE
Awais Hussein S., Ur Reehman S., Chavet C., Coussy P.
in Proceedings of International Conference on Acoustics, Speech, and Signal Processing (ICASSP) - 38th International Conference on Acoustics, Speech, and Signal Processing (ICASSP), France (2013) [hal-00799771 - version 1]
Dedicated approach to explore design space for hardware architecture of turbo decoders
Sanchez O., Awais Hussein S., Ur Reehman S., Chavet C., Coussy P., JEZEQUEL M., Jego C.
Dans Procedings of SiPS conference 2012 - IEEE Workshop on Signal Processing Systems, Canada (2012) [hal-00721379 - version 1]
fulltext access Bipartite edge coloring approach for designing parallel hardware interleaver architecture
Awais Hussein S.
Université de Bretagne Sud (11/05/2012), Eric Martin (Dir.) [tel-00790045 - version 1]
Designing Parallel Interleaver architecture through Tripartite Edge Coloring Approach
Awais Hussein S., Chavet C., Coussy P., Martin E.
GDR SoC-SiP, France (2011) [hal-00682201 - version 1]
A Methodology based on Transportation Problem Modeling for Designing Parallel Interleaver Architectures
Awais Hussein S., Coussy P., Chavet C., Martin E.
Dans In Proceedings of the 36th IEEE International Conference on Acoustics, Speech and Signal Processing - 36th IEEE International Conference on Acoustics, Speech and Signal Processing, Tchèque, République (2011) [hal-00592669 - version 1]
fulltext access An Approach Based on Edge Coloring of Tripartite Graph for Designing Parallel LDPC Interleaver Architecture
Awais Hussein S., Coussy P., Chavet C., Martin E.
Dans Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) 2011 - IEEE International Symposium on Circuits and Systems (ISCAS) 2011, Brésil (2011) [hal-00592617 - version 1]
A Bipartite Edge Coloring Approach for designing Parallel Interleaver architecture
Awais Hussein S., Coussy P., Chavet C., Martin E.
Colloque nationnale du GDR SoC-SiP, France (2010) [hal-00495368 - version 1]