A BIST scheme for SNDR testin g of sigma delta ADCs using sine-wave fitting

Abstract : Sigma–Delta (ΣΔ) modulators have made possible the design of high-resolution Analogue-to-Digital Converters (ADCs) with relaxed analogue circuitry precision by moving most of the design complexity to the digital domain. However, testing these ΣΔ ADCs is becoming a costly task due to trends towards high-resolution implementations and associated increase in samples required to extract key specifications. In this paper, we propose a Built-In Self-Test (BIST) technique for high-resolution ΣΔ ADCs. The technique, mostly digital, moves most of the test complexity to the digital domain, that is in-line with the philosophy of ΣΔ modulation. Both the test signal generation and the output response analysis are performed on-chip. The stimulus, a sinusoid encoded in a binary bit stream, is chosen to have very high quality in the bandwidth of the converter with the quantization error laying outside of the analogue modulator's bandwidth. For the output response analysis, a sine-wave fitting algorithm is implemented on chip. For this, a digital sinusoidal stimulus of a very high precision is needed as a reference signal. In this paper, we generate this reference signal from the same input stimulus, by passing it through the digital filter already existing in the converter. Simulations results show the capability of this technique to obtain measurements of the SNDR (Signal-to-Noise-plus-Distortion Ratio) for a 16-bit audio ΣΔ ADC.
Type de document :
Article dans une revue
Journal of Electronic Testing, Springer Verlag, 2006, pp.325-335
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Contributeur : Ahcène Bounceur <>
Soumis le : mercredi 29 septembre 2010 - 13:11:27
Dernière modification le : jeudi 11 janvier 2018 - 06:15:43


  • HAL Id : hal-00522019, version 1



L. Rolindez, Salvador Mir, A. Bounceur, J.L. Carbonero. A BIST scheme for SNDR testin g of sigma delta ADCs using sine-wave fitting. Journal of Electronic Testing, Springer Verlag, 2006, pp.325-335. 〈hal-00522019〉



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